Rapita Systems blog recap: MC/DC, RVS 3.1 and more

Have you missed some Rapita blog posts over the past few months? This quick recap of recent posts will fill any gaps in your knowledge.

February saw the arrival of the scene-setting introductory post for the “Seven misconceptions of MC/DC” series. In-house MC/DC expert Zoe Stephenson then unleashed a stream of posts demolishing the seven frequently-encountered misconceptions about MC/DC. It’s Everything You Wanted To Know About MC/DC But Were Afraid To Ask, only without Woody Allen jokes:

Intro

#1

#2

#3

#4

#5

#6

#7

Meanwhile, FAE and real-time guru Nick Lay continued with his “Hardware acceleration features that make real-time hard” series. His subject back in February? Multicore processors.

February also saw the launch of RVS 3.1 at Avionics Europe in Munich. FAE embedded automotive expert Rob Malvern kindly produced this outline of the top 5 new RVS 3.1 features and improvements. Check out the Report Comparison feature. Customers asked for it and we delivered.

The recap concludes with posts from April:

• PR and marketing man Mike Towers compared the Top 5 When Good Software Goes Bad blog posts, adding some pithy comments and dodgy metaphors along the way;
• Zoe Stephenson returned with her thoughts on The benefits of early execution time analysis deployment; and
• Marketing & Engineering Services Manager Andrew Coombes finally bowed to global public pressure and released his Safe, portable non-blocking interprocess communication (part 2) blog post.

We hope you enjoyed this recap. The next recap will be available soon.

You might also be interested in our in-house newsletter, RapiTimes, which explores the technical challenges facing embedded engineers. Here are some recent examples of RapiTimes articles which illustrate the types of topics under discussion and provide information which could be helpful to you in your job:

• Achieving robust timing requirements with earlier WCET analysis;

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