We offer courses that help attendees learn how to use Rapita’s multicore timing analysis workflow, including following relevant processes and using the Rapita Verification Suite (RVS) and RapiDaemons efficiently to perform multicore timing analysis. Topics include:
- Writing the multicore timing analysis process into your DO-178C planning documents using the template documents provided by Rapita.
- Setting up RapiDaemons and configuring tuneable RapiDaemons.
- Writing multicore tests in RVS, which use RapiDaemons to investigate the effects of timing behavior when interference is present on different interference channels.
- Analyzing timing results and values from hardware event monitors to understand and quantify interference effects on different interference channels.
- Importing requirements into RVS and using ReqLink to ensure that verification artifacts are traceable and produce traceability reports.
Where necessary, we also include training on fundamental concepts of multicore timing analysis and CAST-32A/A(M)C 20-193 compliance.
We customize our multicore timing analysis training courses to meet your specific needs.